Compile command for VHDL

www.kxcad.net Home > CAE Software Index > MATLAB Index >

Specify a format string passed to fprintf to write the Cmd section of the compilation script for VHDL files.

Settings

Default: vcom %s %s\n

The command-per-file phase (Cmd) of the script is called iteratively, once per generated HDL file or once per signal. On each call, a different file or signal name is passed in.

The two arguments in the compile command are the contents of the SimulatorFlags property and the file name of the current entity or module. To omit the flags, set SimulatorFlags to '' (the default).

Command-Line Information

See Also

• Controlling Script Generation with the EDA Tool Scripts GUI Panel

• HDLCompileVHDLCmd